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B097

Reconfigurable I/O Interfaces for Modern Data Acquisition Systems
Gueorgui Antchev1, Marco Bellato2, Luciano Berti3, Zeno Cavedini4, Daniele Ceccato5, Mauro Giacchini3, Michele Gulmini3, Gaetano Maron3, Roberto Ponchia3, Attila Racz1, Nicola Toniolo3, Gabriele Vedovato3, Sandro Ventura2, Xiaoqin Yang3
  1. CERN
  2. INFN-PD
  3. INFN-LNL
  4. ATENIX srl
  5. Universita' di Padova - dip. di Fisica

Presented by: Marco Bellato

  A modern approach to high speed I/O interfacing is proposed through the use of a flexible architecture based upon Field Programmable Gate Arrays (FPGA) and the PCI bus. Three distinct solutions are reviewed, all manufactured according to PMC (PCI Mezzanine Card) standard: one solution is CPU-based and the other two are CPU-less. The reconfigurability of the architectures is emphasized, showing that, by means of modern design techniques, one can easily partition between hardware and software some CPU-demanding or high latency tasks that are typical of modern Data Acquisition Systems.

Short Paper:  Adobe Acrobat pdf 
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